litex: workshop: add some useful defines

These aren't used right now, but they'll come in handy for examples.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2019-06-19 19:37:45 -07:00
parent 9b0463108f
commit 2d9474c4a6

View file

@ -22,8 +22,10 @@ from lxsocsupport import up5kspram
from valentyusb.usbcore import io as usbio from valentyusb.usbcore import io as usbio
from valentyusb.usbcore.cpu import dummyusb from valentyusb.usbcore.cpu import dummyusb
import argparse from migen import *
from litex.soc.interconnect.csr import AutoCSR, CSRStatus, CSRStorage
import argparse
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
SoCCore.csr_map = { SoCCore.csr_map = {