Adding more README info for minimal example.

This commit is contained in:
Tim 'mithro' Ansell 2019-08-23 13:29:09 +02:00
parent 3ed9172022
commit 6900ebf9a5

View file

@ -2,5 +2,8 @@
A more minimal Verilog example.
Unlike the example in ../verilog-blink it **only** works on the **Fomu hacker
board**.
Unlike the example in ../verilog-blink it;
- **only** works on the **Fomu hacker board**.
- **only** works on Linux
- doesn't use any Makefile variables.