From 79e7a6dd917c1b9ac44ae95564d7290e66ab2c64 Mon Sep 17 00:00:00 2001 From: Tim 'mithro' Ansell Date: Fri, 23 Aug 2019 13:37:51 +0200 Subject: [PATCH] Add note about submodules. --- README.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/README.md b/README.md index 65ca9dd..7f6f54a 100644 --- a/README.md +++ b/README.md @@ -742,6 +742,12 @@ Done! $ ``` +If you get an error message about missing modules, check you have all submodules cloned and setup with; +```sh +$ git submodule update --recursive --init +$ +``` + Take a look at `test/csr.csv`. This describes the various regions present in our design. You can see `memory_region,sram,0x10000000,131072`, which indicates the RAM is 128 kilobytes long and is located at `0x10000000`, just as when we had a CPU. You can also see the timer, which is a feature that comes as part of LiteX. Let's try reading and writing RAM: ```sh