From 0306c4dc723e9606164daf03a8d6a196a7a3d49f Mon Sep 17 00:00:00 2001
From: Graham Edgecombe <gpe@grahamedgecombe.com>
Date: Sat, 9 Dec 2017 21:33:51 +0000
Subject: [PATCH] Add iverilog syntax check target

---
 Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index e664e06..5150915 100644
--- a/Makefile
+++ b/Makefile
@@ -20,7 +20,7 @@ AS       = $(TARGET)-as
 ASFLAGS  = -march=rv32i -mabi=ilp32
 OBJCOPY  = $(TARGET)-objcopy
 
-.PHONY: all clean time stat flash
+.PHONY: all clean check time stat flash
 
 all: $(TOP).bin
 
@@ -41,6 +41,9 @@ $(PLL):
 $(BLIF): $(YS) $(SRC) progmem_syn.hex
 	yosys $(QUIET) -s $<
 
+check: $(SRC)
+	iverilog -Wall -t null -g2012 `yosys-config --datdir/ice40/cells_sim.v` top.sv
+
 $(ASC_SYN): $(BLIF) $(PCF)
 	arachne-pnr $(QUIET) -d $(DEVICE) -P $(PACKAGE) -o $@ -p $(PCF) $<