diff --git a/rv32.sv b/rv32.sv
index 945525f..670d964 100644
--- a/rv32.sv
+++ b/rv32.sv
@@ -18,7 +18,17 @@ module rv32 (
 
     rv32_hazard hazard (
         /* control in */
+        .decode_rs1_in(decode_rs1),
+        .decode_rs2_in(decode_rs2),
+
+        .execute_mem_read_en_in(execute_mem_read_en),
+        .execute_rd_in(execute_rd),
+        .execute_rd_writeback_in(execute_rd_writeback),
+
         .mem_branch_taken_in(mem_branch_taken),
+        .mem_read_en_in(mem_read_en),
+        .mem_rd_in(mem_rd),
+        .mem_rd_writeback_in(mem_rd_writeback),
 
         /* control out */
         .fetch_stall_out(fetch_stall),
@@ -222,6 +232,7 @@ module rv32 (
         .branch_pc_in(execute_branch_pc),
 
         /* control out */
+        .read_en_out(mem_read_en),
         .branch_taken_out(mem_branch_taken),
         .rd_out(mem_rd),
         .rd_writeback_out(mem_rd_writeback),
@@ -231,6 +242,9 @@ module rv32 (
         .branch_pc_out(mem_branch_pc)
     );
 
+    /* mem -> hazard control */
+    logic mem_read_en;
+
     /* mem -> writeback control */
     logic [4:0] mem_rd;
     logic mem_rd_writeback;
diff --git a/rv32_hazard.sv b/rv32_hazard.sv
index ebcb400..6ff4f8f 100644
--- a/rv32_hazard.sv
+++ b/rv32_hazard.sv
@@ -3,7 +3,17 @@
 
 module rv32_hazard (
     /* control in */
+    input [4:0] decode_rs1_in,
+    input [4:0] decode_rs2_in,
+
+    input execute_mem_read_en_in,
+    input [4:0] execute_rd_in,
+    input execute_rd_writeback_in,
+
     input mem_branch_taken_in,
+    input mem_read_en_in,
+    input [4:0] mem_rd_in,
+    input mem_rd_writeback_in,
 
     /* control out */
     output fetch_stall_out,
@@ -18,10 +28,21 @@ module rv32_hazard (
     output mem_stall_out,
     output mem_flush_out
 );
+    logic decode_wait_for_mem_read;
+
+    always_comb begin
+        if ((decode_rs1_in == execute_rd_in || decode_rs2_in == execute_rd_in) && |execute_rd_in && execute_mem_read_en_in && execute_rd_writeback_in)
+            decode_wait_for_mem_read = 1;
+        else if ((decode_rs1_in == mem_rd_in || decode_rs2_in == mem_rd_in) && |mem_rd_in && mem_read_en_in && mem_rd_writeback_in)
+            decode_wait_for_mem_read = 1;
+        else
+            decode_wait_for_mem_read = 0;
+    end
+
     assign fetch_stall_out = decode_stall_out;
     assign fetch_flush_out = 0;
 
-    assign decode_stall_out = execute_stall_out;
+    assign decode_stall_out = execute_stall_out || decode_wait_for_mem_read;
     assign decode_flush_out = fetch_stall_out || mem_branch_taken_in;
 
     assign execute_stall_out = mem_stall_out;
diff --git a/rv32_mem.sv b/rv32_mem.sv
index abba260..1e165ac 100644
--- a/rv32_mem.sv
+++ b/rv32_mem.sv
@@ -26,6 +26,7 @@ module rv32_mem (
     input [31:0] branch_pc_in,
 
     /* control out */
+    output read_en_out,
     output branch_taken_out,
     output [4:0] rd_out,
     output rd_writeback_out,
@@ -115,6 +116,7 @@ module rv32_mem (
 
     always_ff @(posedge clk) begin
         if (!stall_in) begin
+            read_en_out <= read_en_in;
             rd_out <= rd_in;
             rd_writeback_out <= rd_writeback_in;