From bf7b1bef4ff5eeca613e250cff84a763c1c897e3 Mon Sep 17 00:00:00 2001
From: Graham Edgecombe <gpe@grahamedgecombe.com>
Date: Fri, 8 Dec 2017 22:29:22 +0000
Subject: [PATCH] Pass -full to opt

Reduces the number of LUTs slightly.
---
 top.ys | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/top.ys b/top.ys
index 7abbdb1..28173f7 100644
--- a/top.ys
+++ b/top.ys
@@ -1,6 +1,6 @@
 read_verilog -noautowire -sv top.sv
 proc
-opt
+opt -full
 alumacc
 share -aggressive
 synth_ice40 -abc2 -top top -blif top.blif