From d5c87dacf64ed97f3c31051f5077dcf3d88a03cd Mon Sep 17 00:00:00 2001 From: Graham Edgecombe Date: Thu, 14 Dec 2017 23:46:18 +0000 Subject: [PATCH] Add MRET and WFI instruction encoding I'm probably going to implement a subset of the privileged ISA for interrupt support. --- rv32_opcodes.sv | 2 ++ 1 file changed, 2 insertions(+) diff --git a/rv32_opcodes.sv b/rv32_opcodes.sv index b713ee0..e5f6462 100644 --- a/rv32_opcodes.sv +++ b/rv32_opcodes.sv @@ -43,6 +43,8 @@ `define RV32_INSTR_FENCE_I 32'b???????_?????_?????_001_?????_0001111 `define RV32_INSTR_ECALL 32'b0000000_00000_00000_000_00000_1110011 /* SYSTEM */ `define RV32_INSTR_EBREAK 32'b0000000_00001_00000_000_00000_1110011 +`define RV32_INSTR_MRET 32'b0011000_00010_00000_000_00000_1110011 +`define RV32_INSTR_WFI 32'b0001000_00101_00000_000_00000_1110011 `define RV32_INSTR_CSRRW 32'b???????_?????_?????_001_?????_1110011 `define RV32_INSTR_CSRRS 32'b???????_?????_?????_010_?????_1110011 `define RV32_INSTR_CSRRC 32'b???????_?????_?????_011_?????_1110011