Commit graph

12 commits

Author SHA1 Message Date
Sean Cross
87e50896ef lxbuildenv: check for git, and support skipping submodules
Check for git now, since it's mostly required.

Also add a configuration option, which allows us to skip the
submodule check.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-20 08:31:48 -07:00
Sean Cross
2d9474c4a6 litex: workshop: add some useful defines
These aren't used right now, but they'll come in handy for examples.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 19:37:45 -07:00
Sean Cross
9b0463108f verilog-blink: add verilog version of blink example
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 18:04:42 -07:00
Sean Cross
af89bcc7f3 gitignore: organize and comment on files
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 18:01:06 -07:00
Sean Cross
01913005cf riscv-usb-cdcacm: add example project
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 14:50:37 -07:00
Sean Cross
95b138b984 riscv-blink: make ledd registers global
Make these registers global so that we can access them from anywhere.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 14:41:54 -07:00
Sean Cross
36b2794f94 riscv-blink: add example
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 14:34:13 -07:00
Sean Cross
ac9e39bdcf litex: move examples into litex/ directory
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 14:31:43 -07:00
Sean Cross
6862a659f9 gitignore: ignore pyc and test/
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 12:42:12 -07:00
Sean Cross
afb45e75ee workshop: now enumerating as usb
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 12:41:20 -07:00
Sean Cross
f0c111b5bc deps: valentyusb: add dummyusb
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 11:52:26 -07:00
Sean Cross
b1c2b36cb1 initial commit
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 09:51:22 -07:00