78 lines
1.8 KiB
Makefile
78 lines
1.8 KiB
Makefile
QUIET = -q
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PLL = pll.sv
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SRC = $(sort $(wildcard *.sv) $(PLL))
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TOP = top
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SV = $(TOP).sv
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YS = $(TOP).ys
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YS_ICE40 = `yosys-config --datdir/ice40/cells_sim.v`
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BLIF = $(TOP).blif
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ASC_SYN = $(TOP)_syn.asc
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ASC = $(TOP).asc
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BIN = $(TOP).bin
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TIME_RPT = $(TOP).rpt
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STAT = $(TOP).stat
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SPEED = hx
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DEVICE = 8k
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PACKAGE = ct256
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PCF = ice40hx8k-b-evn.pcf
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FREQ_OSC = 12
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FREQ_PLL = 32
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TARGET = riscv64-unknown-elf
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AS = $(TARGET)-as
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ASFLAGS = -march=rv32i -mabi=ilp32
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LD = $(TARGET)-ld
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LDFLAGS = -Tprogmem.lds -melf32lriscv
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CC = $(TARGET)-gcc
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CFLAGS = -march=rv32i -mabi=ilp32 -Wall -Wextra -pedantic -DFREQ=$(FREQ_PLL)000000
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OBJCOPY = $(TARGET)-objcopy
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.PHONY: all clean syntax time stat flash
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all: $(BIN)
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clean:
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$(RM) $(BLIF) $(ASC_SYN) $(ASC) $(BIN) $(PLL) progmem_syn.hex progmem.hex progmem.o start.o progmem
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progmem.hex: progmem
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$(OBJCOPY) -O srec $< /dev/stdout \
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| srec_cat - -byte-swap 4 -output - -binary \
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| xxd -p -c 4 > $@
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progmem: progmem.o start.o progmem.lds
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$(LD) $(LDFLAGS) -o $@ progmem.o start.o
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progmem_syn.hex:
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icebram -g 32 2048 > $@
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$(PLL):
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icepll $(QUIET) -i $(FREQ_OSC) -o $(FREQ_PLL) -m -f $@
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$(BLIF): $(YS) $(SRC) progmem_syn.hex
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yosys $(QUIET) -s $<
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syntax: $(SRC) progmem_syn.hex
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iverilog -Wall -t null -g2012 $(YS_ICE40) $(SV)
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$(ASC_SYN): $(BLIF) $(PCF)
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arachne-pnr $(QUIET) -d $(DEVICE) -P $(PACKAGE) -o $@ -p $(PCF) $<
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$(TIME_RPT): $(ASC_SYN) $(PCF)
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icetime -t -m -d $(SPEED)$(DEVICE) -P $(PACKAGE) -p $(PCF) -c $(FREQ_PLL) -r $@ $<
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$(ASC): $(ASC_SYN) progmem_syn.hex progmem.hex
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icebram progmem_syn.hex progmem.hex < $< > $@
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$(BIN): $(ASC)
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icepack $< $@
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time: $(TIME_RPT)
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cat $<
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$(STAT): $(ASC_SYN)
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icebox_stat $< > $@
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stat: $(STAT)
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cat $<
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flash: $(BIN) $(TIME_RPT)
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iceprog -S $<
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