Add initial support for SYSTEM instructions to the decoder
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9259065656
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2 changed files with 46 additions and 0 deletions
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@ -68,6 +68,7 @@ module rv32_decode (
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logic [31:0] imm_j;
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logic [31:0] shamt;
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logic [31:0] zimm;
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assign funct7 = instr_in[31:25];
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assign rs2 = instr_in[24:20];
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@ -85,6 +86,7 @@ module rv32_decode (
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assign imm_j = {{12{sign}}, instr_in[19:12], instr_in[20], instr_in[30:25], instr_in[24:21], 1'b0};
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assign shamt = {27'bx, rs2};
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assign zimm = {27'b0, rs1};
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assign rs1_unreg_out = rs1;
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assign rs2_unreg_out = rs2;
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@ -510,6 +512,39 @@ module rv32_decode (
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/* FENCE.I */
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valid_out <= 1;
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_PRIV, `RV32_FUNCT7_ANY}: begin
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// TODO: EBREAK/ECALL
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRW, `RV32_FUNCT7_ANY}: begin
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/* CSRRW */
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valid_out <= 1;
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// TODO
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRS, `RV32_FUNCT7_ANY}: begin
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/* CSRRS */
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valid_out <= 1;
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// TODO
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRC, `RV32_FUNCT7_ANY}: begin
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/* CSRRC */
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valid_out <= 1;
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// TODO
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRWI, `RV32_FUNCT7_ANY}: begin
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/* CSRRWI */
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valid_out <= 1;
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// TODO
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRSI, `RV32_FUNCT7_ANY}: begin
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/* CSRRSI */
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valid_out <= 1;
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// TODO
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end
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{`RV32_OPCODE_SYSTEM, `RV32_FUNCT3_SYSTEM_CSRRCI, `RV32_FUNCT7_ANY}: begin
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/* CSRRCI */
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valid_out <= 1;
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// TODO
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end
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endcase
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if (flush_in) begin
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@ -45,12 +45,23 @@
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`define RV32_FUNCT3_MISC_MEM_FENCE 3'b000
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`define RV32_FUNCT3_MISC_MEM_FENCE_I 3'b001
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`define RV32_FUNCT3_SYSTEM_PRIV 3'b000
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`define RV32_FUNCT3_SYSTEM_CSRRW 3'b001
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`define RV32_FUNCT3_SYSTEM_CSRRS 3'b010
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`define RV32_FUNCT3_SYSTEM_CSRRC 3'b011
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`define RV32_FUNCT3_SYSTEM_CSRRWI 3'b101
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`define RV32_FUNCT3_SYSTEM_CSRRSI 3'b110
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`define RV32_FUNCT3_SYSTEM_CSRRCI 3'b111
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`define RV32_FUNCT7_ANY 7'b???????
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`define RV32_FUNCT7_ZERO 7'b0000000
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`define RV32_FUNCT7_OP_SRA 7'b0100000
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`define RV32_FUNCT7_OP_SUB 7'b0100000
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`define RV32_FUNCT12_SYSTEM_PRIV_ECALL 12'b000000000000
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`define RV32_FUNCT12_SYSTEM_PRIV_EBREAK 12'b000000000001
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`define RV32_INSTR_NOP {12'bx, 5'b0, 3'bx, 5'b0, `RV32_OPCODE_OP_IMM}
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`endif
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