32-bit RISC-V system on chip for iCE40 FPGAs

Graham Edgecombe e7389a3065 Fix shamt decoding		2017-12-01 21:51:41 +00:00
.gitignore	Add initial fetch/decode stages	2017-12-01 08:46:43 +00:00
ice40hx8k-b-evn.pcf	Add initial fetch/decode stages	2017-12-01 08:46:43 +00:00
Makefile	Add initial fetch/decode stages	2017-12-01 08:46:43 +00:00
rv32.sv	Use -noautowire to avoid using logic in every input/output declaration	2017-12-01 18:49:48 +00:00
rv32_decode.sv	Fix shamt decoding	2017-12-01 21:51:41 +00:00
rv32_fetch.sv	Use -noautowire to avoid using logic in every input/output declaration	2017-12-01 18:49:48 +00:00
rv32_opcodes.sv	Add initial fetch/decode stages	2017-12-01 08:46:43 +00:00
rv32_regs.sv	Use -noautowire to avoid using logic in every input/output declaration	2017-12-01 18:49:48 +00:00
top.sv	Add initial fetch/decode stages	2017-12-01 08:46:43 +00:00
top.ys	Use -noautowire to avoid using logic in every input/output declaration	2017-12-01 18:49:48 +00:00