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Add MRET and WFI instruction encoding

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I'm probably going to implement a subset of the privileged ISA for
interrupt support.
This commit is contained in:
Graham Edgecombe 2017-12-14 23:46:18 +00:00
parent 5f84ff150b
commit d5c87dacf6
1 changed files with 2 additions and 0 deletions
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rv32_opcodes.sv
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@ -43,6 +43,8 @@
`define RV32_INSTR_FENCE_I 32'b???????_?????_?????_001_?????_0001111
`define RV32_INSTR_ECALL 32'b0000000_00000_00000_000_00000_1110011 /* SYSTEM */
`define RV32_INSTR_EBREAK 32'b0000000_00001_00000_000_00000_1110011
`define RV32_INSTR_MRET 32'b0011000_00010_00000_000_00000_1110011
`define RV32_INSTR_WFI 32'b0001000_00101_00000_000_00000_1110011
`define RV32_INSTR_CSRRW 32'b???????_?????_?????_001_?????_1110011
`define RV32_INSTR_CSRRS 32'b???????_?????_?????_010_?????_1110011
`define RV32_INSTR_CSRRC 32'b???????_?????_?????_011_?????_1110011