Although the processor uses little-endian addressing, the memory bus
itself is big-endian. (This simplifies the implementation of
memory-mapped registers.)
However, this does mean the contents of the RAM need to be in big-endian
order, rather than little-endian order. $readmemh does not provide any
control over byte order, so we previously swapped the byte order of
progmem.hex with srec_cat in the Makefile.
This commit changes the ram module to swap the byte order upon
reading/writing. This removes the need to use srec_cat in the Makefile.
Swapping the byte order in hardware shouldn't cause any performance
impact as it just involves re-arranging wires.
This commit:
* changes the type of all output variables to logic
* splits variable declaration and assignment
* declares variables before modules that use the variables
