Graham Edgecombe
e4e2e65293
Port example program to C
2017-12-15 20:08:55 +00:00
Graham Edgecombe
d97f8c5e8e
Add yosys-config --datdir workaround
...
The yosys-git AUR package doesn't set the PREFIX variable correctly.
2017-12-15 18:35:26 +00:00
Graham Edgecombe
9259065656
Rename check target to syntax
...
check is normally used for automated tests.
2017-12-12 21:20:49 +00:00
Graham Edgecombe
f19d41c8a2
Replace $(TOP).bin with $(BIN)
2017-12-10 14:10:51 +00:00
Graham Edgecombe
b8e848cb0e
Add SV variable to replace $(TOP).sv
2017-12-10 14:10:33 +00:00
Graham Edgecombe
8e1f64eea0
Add progmem_syn.hex dependency to the check target
2017-12-10 09:25:37 +00:00
Graham Edgecombe
9c8dfd1b82
Replace top.sv with $(TOP).sv
2017-12-10 09:25:18 +00:00
Graham Edgecombe
0306c4dc72
Add iverilog syntax check target
2017-12-09 21:33:51 +00:00
Graham Edgecombe
3ed53406a0
Move timing closure requirement to the flash target
...
It's possible that some tools interact with the bitstream directly
rather than the .asc files, and we may still want to run them even if
timing closure is not met.
2017-12-07 22:37:58 +00:00
Graham Edgecombe
b4e0e6ceb0
Store icebox_stat output in top.stat
...
This also takes a long time to generate.
2017-12-07 22:37:58 +00:00
Graham Edgecombe
967f3d1414
Delete pll.sv in the clean target
2017-12-07 22:37:58 +00:00
Graham Edgecombe
560f45d3ca
Require timing closure to be met before creating the bitstream
2017-12-07 22:37:58 +00:00
Graham Edgecombe
260c0429bd
Store timing report in top.rpt
...
This stops us needing to re-generate it if the design hasn't changed.
2017-12-07 22:37:58 +00:00
Graham Edgecombe
26f6b88da8
Add PLL
2017-12-07 22:37:58 +00:00
Graham Edgecombe
eb053503f7
Populate instr_mem with a test assembly program
2017-12-02 18:07:37 +00:00
Graham Edgecombe
4a4dee334d
Add initial fetch/decode stages
2017-12-01 08:46:43 +00:00
