icicle/top.ys
Graham Edgecombe bf7b1bef4f Pass -full to opt
Reduces the number of LUTs slightly.
2017-12-08 22:29:22 +00:00

6 lines
119 B
Text

read_verilog -noautowire -sv top.sv
proc
opt -full
alumacc
share -aggressive
synth_ice40 -abc2 -top top -blif top.blif