Graham Edgecombe
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36b7d33850
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Read mem_{read,write}_en to mem_{read,write}
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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365d3e37c6
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Memory map the LEDs
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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018faac560
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Add memory bus and move data memory to a separate module
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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03ecd3a97d
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Remove unused mem_read_en output
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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da26f86f25
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Remove two cycle load-use stall
There's no need for it as we forward results from the writeback to the
execute stage.
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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0c3b91e733
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Fix load-use hazard logic
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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0acde319b0
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Stall the decode stage if it is waiting on a load
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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965311c1e5
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Add mem_ prefix to the hazard unit's branch_taken input
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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86022d42a5
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Follow the standard naming/commenting conventions in hazard-related code
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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5ec95c00a2
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Flush the decode/execute stages if a branch is taken
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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4c2c44e94d
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Add initial hazard unit
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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310c275ba2
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Hard-wire stall and flush inputs to zero
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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83b7d1c9b7
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Add 'from stage' comments if inputs are not from the previous stage
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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dd6e01fb5c
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Move result/mem_read_value mux to the mem stage
This should reduce the logic required to forward the writeback rd_value
to the execute stage, which is on the critical path.
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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8e2ce65ad9
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Add operand forwarding to the execute stage
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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871e1f4a32
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Add LB, LBU, LH, LHU, SB and SH instructions
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2017-12-07 22:37:58 +00:00 |
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Graham Edgecombe
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9de9955ad0
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Connect lower 8 bits of x31 to the LEDs for debugging
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2017-12-02 15:33:45 +00:00 |
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Graham Edgecombe
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86f6e0eec1
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Add branching support
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2017-12-02 15:23:12 +00:00 |
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Graham Edgecombe
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4c68818134
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Add writeback stage
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2017-12-02 11:26:12 +00:00 |
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Graham Edgecombe
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3f8e64c65a
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Add memory access stage
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2017-12-02 10:22:48 +00:00 |
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Graham Edgecombe
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efb33456f9
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Add include guards
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2017-12-01 23:30:33 +00:00 |
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Graham Edgecombe
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30b793cbaf
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Add ALU
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2017-12-01 23:02:50 +00:00 |
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Graham Edgecombe
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ed238e5e9b
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Use -noautowire to avoid using logic in every input/output declaration
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2017-12-01 18:49:48 +00:00 |
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Graham Edgecombe
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4a4dee334d
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Add initial fetch/decode stages
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2017-12-01 08:46:43 +00:00 |
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