Graham Edgecombe
|
e801556428
|
Replace localparams at the root level with defines
iverilog doesn't support localparams at the root level.
|
2017-12-09 10:44:39 +00:00 |
|
Graham Edgecombe
|
460159a392
|
Rename rd_writeback to rd_write
This is consistent with the mem_read and mem_write naming.
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
36b7d33850
|
Read mem_{read,write}_en to mem_{read,write}
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
0c79ae6fc5
|
Pass forwarded rs1 value to the branch target mux
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
bd0a56118d
|
Pass forwarded rs2 value to the mem stage
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
86022d42a5
|
Follow the standard naming/commenting conventions in hazard-related code
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
eff39ad19b
|
Add flush and stall inputs to every stage
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
29e4c40af4
|
Remove clock input from ALU and branch PC mux
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
8e2ce65ad9
|
Add operand forwarding to the execute stage
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
871e1f4a32
|
Add LB, LBU, LH, LHU, SB and SH instructions
|
2017-12-07 22:37:58 +00:00 |
|
Graham Edgecombe
|
bef709dc73
|
Replace always with always_ff
|
2017-12-02 18:29:51 +00:00 |
|
Graham Edgecombe
|
86f6e0eec1
|
Add branching support
|
2017-12-02 15:23:12 +00:00 |
|
Graham Edgecombe
|
4c68818134
|
Add writeback stage
|
2017-12-02 11:26:12 +00:00 |
|
Graham Edgecombe
|
3f8e64c65a
|
Add memory access stage
|
2017-12-02 10:22:48 +00:00 |
|
Graham Edgecombe
|
efb33456f9
|
Add include guards
|
2017-12-01 23:30:33 +00:00 |
|
Graham Edgecombe
|
30b793cbaf
|
Add ALU
|
2017-12-01 23:02:50 +00:00 |
|